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Target
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Qbraid
Qbraid
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Stdlib
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Rewrite
Rewrite
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Passes
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Callgraph
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Rules
Rules
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Split ifs
Squin
Squin
Groups
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Fidelity
Fidelity
Impls
Validation
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Circuit depth
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Circuit depth
Simple nocloning
Simple nocloning
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Gate
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Noise
Noise
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Passes
Passes
Qasm2 gate func to squin
Qasm2 to squin
Qasm3 gate func to squin
Qasm3 to squin
Rewrite
Rewrite
U3 to clifford
non clifford to U3
Wrap analysis
Qasm2
Qasm2
Id to squin
Noise to squin
Qasm2 direct to squin
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Qasm3
Qasm3
Qasm3 direct to squin
Qasm3 expr to py
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Stdlib
Stdlib
Broadcast
Broadcast
Gate
Noise
Simple
Simple
Gate
Noise
Stim
Stim
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Groups
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From squin validation
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Control 2q
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Pp
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Stim cf
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Emit
Emit
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Parse
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Passes
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Rewrite
Rewrite
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Insert ticks
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Resolve get rec idx
Resolve set annotate
Scf for to repeat
Set detector partial
Set observable partial
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From squin
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Circuit
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Visual
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Animation
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Gate event
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Atoms
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Bloqade Lanes
Lanes
Lanes
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Atom
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Arch
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Spec
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Build
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Word factory
V2
V2
Builder
Gemini
Gemini
State injection
Logical
Logical
Rewrite
Spec
Stmts
Upstream
Validation
Physical
Physical
Spec
Gemini full
Gemini full
Spec
Generic full
Generic full
Spec
Bytecode
Bytecode
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Encoding
Exceptions
Grid
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Dialects
Dialects
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Place
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Arch
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Impl
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Arrange
Arrange
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Steane713
Steane713
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Star
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Typeinfer
Extensions
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Heuristics
Move synthesis
Simple layout
Logical
Logical
Layout
Placement
Physical
Physical
Layout
Movement
No return
Nohome
Placement
Policy movement
Receding horizon
Target generator
Target generator dsl
Rewrite
Rewrite
Circuit2place
Clifford2native
Eliminate rz
Fuse gates
Initialize
Inline dup
Measure lower
Move2stack move
Normalize axis angles
Place2move
Qubit count
Remove debug
Remove postprocessing
Resolve pinned
Squin2stim
Stack move2move
Stackify
State
Steane transversal
Transversal
Move2squin
Move2squin
Base
Gates
Noise
Reorder static placement
Reorder static placement
Alap
Asap
Common
Rule
Transform
Transform
Move to squin
Move to stack
Native to place
Pipeline
Place to move
Validation
Validation
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Call site
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Flat block
Kernel args
Move to
Qubit register
Recursion
Static call
Steane
Terminal measure
Terminal measurement
Visualize
Visualize
App
Arch
Artist
Debug
Plotly circuit
Plotly debug
Entropy tree
Entropy tree
Cli
Controller
Renderer
State
Tracer
Bloqade Analog
Bloqade Analog
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Constants
Factory
Migrate
Serialize
Builder
Builder
Args
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Coupling
Drive
Field
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Pragmas
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Sequence builder
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Start
Typing
Waveform
Backend
Backend
Bloqade
Braket
Quera
Parse
Parse
Builder
Stream
Trait
Compiler
Compiler
Analysis
Analysis
Common
Common
Assignment scan
Check slices
Is constant
Is hyperfine
Scan channels
Scan variables
Hardware
Hardware
Channels
Lattice
Piecewise constant
Piecewise linear
Python
Python
Waveform
Passes
Passes
Emulator
Hardware
Hardware
Components
Define
Units
Rewrite
Rewrite
Common
Common
Add padding
Assign to literal
Assign variables
Canonicalize
Flatten
Python
Python
Waveform
Emulate
Emulate
Sparse operator
Ir
Ir
Atom type
Emulator
Space
State vector
Ir
Ir
Analog circuit
Scalar
Control
Control
Field
Pulse
Sequence
Waveform
Traits
Traits
Append
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Hash
Slice
Location
Location
Bravais
Location
Routine
Routine
Base
Bloqade
Braket
Params
Quera
Submission
Submission
Base
Braket
Load config
Mock
Quera
Ir
Ir
Braket
Capabilities
Parallel
Task results
Task specification
Task
Task
Base
Batch
Bloqade
Braket
Braket simulator
Exclusive
Quera
Blog
Blog
Archive
Archive
2025
2023
QuEra Computing
Table of contents
rewrite
Index
Rewrite rules for lowering the squin dialect into the STIM dialect.
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